- Withstand voltage of VDD power of 20V
- Withstand voltage at SW bridge arm midpoint of -10V to 115V
- Negative withstand voltage of input pin of -10V
- The HS voltage ramp up rate of 50V/ns
- Peak source/sink current 3A/-4A
- Compatible with CMOS/TTL level input
- Input interlock
- Independent UVLO protection for high-side and low-side output
- Integrated high-voltage bootstrap diode
- Typical input/output delay of 16ns
- Typical transmission delay matching between high and low sides of 1ns
- DFN10 package has enable pin, and the static power consumption is 7μA in standby mode
- Junction temperature range of -40°C to 150°C
- Micro inverter and power optimizer
- Power module
- New energy vehicles
